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 ASAHI KASEI
[AKD5381-B]
AKD5381-B
AK5381 Evaluation Board Rev.1
GENERAL DESCRIPTION AKD5381-B is an evaluation board for the digital audio 24bit 96kHz A/D converter, AK5381. AKD5381-B has analog input circuits and a digital interface transmitter,and can achieve the interface with digital audio systems via opt-connector. Ordering guide
AKD5381-B --AK5381 Evaluation Board
FUNCTION * DIT (AK4114) with optical output
VA,VD
AGND,DGND
LIN
RIN
AK5381
AK4114 (DIT)
Opt Out
DSP Data 10pin Header
Figure 1. AKD5381-B Block Diagram * Circuit diagram and PCB layout are attached at the end of this manual.
-1-
2006/04
ASAHI KASEI
[AKD5381-B]
1. Evaluation Board Manual Operation sequence
1) Set up the power supply lines. [VA] (red) = 2.7 5.5V or +15V [VD] (orange) = 2.7 5.5V [VCC] (red) = 3.3V [AGND] (black) = 0V [DGND] (black) = 0V
: for VA of AK5381 (typ. 5.0V) : for VD of AK5381, 74HC14 (typ. 5.0V) : for AK4114 : for analog ground : for logic ground
Each supply line should be distributed from the power supply unit. 2) Set up the evaluation mode, jumper pins and DIP switches. (See the followings.) 3) Power on. The AK5381 and AK4114 should be reset once bringing SW2 = "L" upon power-up.
Evaluation mode
(1) Slave Mode (1-1) A/D evaluation using DIT function of AK4114 PORT2 (DIT) is used. DIT generates audio bi-phase signal from received data and which is output through optical connector (TOTX141). It is possible to connect AKM's D/A converter evaluation boards on the digital-amplifier, which equips DIR input. Nothing should be connected to PORT1 (DSP).
JP5 MCLK
(1-2) All interface signals including master clock are fed externally. PORT1 (DSP) is used. All interface signals (MCLK, SCLK, LRCK) are provided to the AK5381 through PORT1. JP5 (MCLK) should be open. The DIF1 of SW1 (MODE) should be set to "H".
JP5 MCLK
-2-
2006/04
ASAHI KASEI
[AKD5381-B]
(2) Master Mode (2-1) A/D evaluation using DIT function of AK4114 PORT2 (DIT) is used. DIT generates audio bi-phase signal from received data and which is output through optical connector (TOTX141). It is possible to connect AKM's D/A converter evaluation boards on the digital-amplifier, which equips DIR input. Nothing should be connected to PORT1 (DSP). The DIF1 of SW1 (MODE) should be set to "H".
JP5 MCLK
(2-2) Master clock is fed externally. PORT1 (DSP) is used. MCLK is provided to the AK5381 through PORT1. JP5 (MCLK) should be open. The DIF1 of SW1 (MODE) should be set to "H".
JP5 MCLK
Other jumper pins set up
1. JP1 (GND) : Analog ground and Digital ground OPEN : Separated. SHORT : Common. (The connector "DGND" can be open.) 2. JP2 (CKS1) : Setting of CKS1 pin for AK5381 H : Master mode L : Slave mode
3. JP3 (VA) : Select VA for AK5381 VA : Supply from VA connector REG : Supply from regulator. VA connector should be supplied +15V. 4. JP4 (VD) : Select VD for AK5381 VA : Supply from VA connector VD : Supply from VD connector
-3-
2006/04
ASAHI KASEI
[AKD5381-B]
DIP Switch set up
[SW1] (MODE1): Setting the evaluation mode for AK5381 and AK4114 ON is "H", OFF is "L". CKS1 should be set by JP2. No. 1 2 3 4 Name CKS0 CKS2 DIF DIF1 OFF ("L") See Table 2 MSB justified AK4114 Master mode Table 1. Mode Setting HPF ON OFF ON ON ON I2S Compatible AK4114 Slave mode ON ("H")
CKS2 L L L L H H H H
CKS1 L L H H L L H H
CKS0 L H L H L H L H
Input Level CMOS CMOS CMOS CMOS TTL
Master/Slave MCLK Slave 256/384/512/768fs Slave 256/384/512/768fs Master 256fs ( 96kHz) Master 512fs ( 48kHz) Slave 256/384/512/768fs Reserved CMOS ON Master 384fs ( 96kHz) CMOS ON Master 768fs ( 48kHz) Table 2. Mode Setting of AK5381
SCLK 48fs or 32fs 48fs or 32fs 64fs 64fs 48fs or 32fs 64fs 64fs
Note: AK4114 does not support MCLK=384fs/512fs/768fs. PORT1 (DSP) should be used when MCLK=384fs/512fs/768fs.
The function of the toggle SW
Upper-side is "H" and lower-side is "L". [SW2] (PDN): Resets the AK5381 and AK4114. Keep "H" during normal operation.
-4-
2006/04
ASAHI KASEI
[AKD5381-B]
Analog Input Circuits
Analog signal is input via J1(RIN) and J2(LIN) of RCA connectors.
J1 RIN C1 10u AINR +
J2 LIN
C2 10u AINL +
Figure 2. Analog Input circuits
* AKM assumes no responsibility for the trouble when using the circuit examples.
-5-
2006/04
ASAHI KASEI
[AKD5381-B]
MEASUREMENT RESULTS
[Measurement condition] * Measurement unit : Audio Precision, System Two Cascade * MCLK : 256fs * SCLK : 64fs : 48kHz, 96kHz * fs : 24bit * Bit : VA = VD = 5.0V (Using regulator) * Power Supply * Interface : DIT * Temperature : Room
Parameter ADC Analog Input Characteristics: fs=48kHz S/(N+D) (-1dB Input) fs=96kHz fs=48kHz, A-weighted D-Range (-60dB Input) fs=96kHz S/N fs=48kHz, A-weighted fs=96kHz Interchannel Isolation
Result (Lch / Rch) 89.0 / 88.4 86.9 / 86.2 102.7 / 102.4 99.2 / 99.2 102.8 / 102.8 99.4 / 99.4 123.6 / 123.8
Unit dB dB dB dB dB dB dB
-6-
2006/04
ASAHI KASEI
[AKD5381-B]
[ADC Plot : fs=48kHz]
AKM
-70
AK5381 THD+N vs. Input Level VA=VD=5.0V, fs=48kHz, fin=1kHz
-75
-80
-85
-90 d B F S
-95
-100
-105
-110
-115
-120 -120
-110
-100
-90
-80
-70
-60 dBr
-50
-40
-30
-20
-10
Figure 1. THD+N vs. Input Level
AKM
-70
AK5381 THD+N vs. Input Frequency VA=VD=5.0V, fs=48kHz, Input=-1dBr
-75
-80
-85
-90 d B F S
-95
-100
-105
-110
-115
-120 20
50
100
200
500 Hz
1k
2k
5k
10k
20k
Figure 2. THD+N vs. Input Frequency
-7-
2006/04
ASAHI KASEI
[AKD5381-B]
AKM
+0 -10 -20 -30 -40 -50 d B F S -60 -70 -80 -90 -100 -110 -120 -120
AK5381 Linearity VA=VD=5.0V, fs=48kHz, fin=1kHz
-110
-100
-90
-80
-70
-60 dBr
-50
-40
-30
-20
-10
+0
Figure 3. Linearity
AKM
-0.5
AK5381 Frequency Response VA=VD=5.0V, fs=48kHz, Input=-1dBr
-0.6
-0.7
-0.8
-0.9 d B F S
-1
-1.1
-1.2
-1.3
-1.4
-1.5 20
50
100
200
500 Hz
1k
2k
5k
10k
20k
Figure 4. Frequency Response
-8-
2006/04
ASAHI KASEI
[AKD5381-B]
AKM
-70 -75 -80 -85 -90 -95 -100 -105 d B -110 -115 -120 -125 -130 -135 -140 -145 -150 20 50 100
AK5381 Crosstalk VA=VD=5.0V, fs=48kHz, Input=-1dBr
200
500 Hz
1k
2k
5k
10k
20k
Figure 5. Crosstalk
AKM
+0 -10 -20 -30 -40 -50 -60 -70 d B F S -80 -90 -100 -110 -120 -130 -140 -150 -160 -170 -180 20 50 100
AK5381 FFT Plot VA=VD=5.0V, fs=48kHz, Input=-1dBr, fin=1kHz
200
500 Hz
1k
2k
5k
10k
20k
Figure 6. FFT Plot
-9-
2006/04
ASAHI KASEI
[AKD5381-B]
AKM
+0 -10 -20 -30 -40 -50 -60 -70 d B F S -80 -90 -100 -110 -120 -130 -140 -150 -160 -170 -180 20 50 100
AK5381 FFT Plot VA=VD=5.0V, fs=48kHz, Input=-60dBr, fin=1kHz
200
500 Hz
1k
2k
5k
10k
20k
Figure 7. FFT Plot
AKM
+0 -10 -20 -30 -40 -50 -60 -70 d B F S -80 -90 -100 -110 -120 -130 -140 -150 -160 -170 -180 20 50 100
AK5381 FFT Plot VA=VD=5.0V, fs=48kHz, fin=None
200
500 Hz
1k
2k
5k
10k
20k
Figure 8. FFT Plot
- 10 -
2006/04
ASAHI KASEI
[AKD5381-B]
[ADC Plot : fs=96kHz]
AKM
-70 -72.5 -75 -77.5 -80 -82.5 -85 -87.5 -90 d B F S -92.5 -95 -97.5 -100 -102.5 -105 -107.5 -110 -112.5 -115 -117.5 -120 -120 -110 -100 -90
AK5381 THD+N vs. Input Level VA=VD=5.0V, fs=96kHz, fin=1kHz
-80
-70
-60 dBr
-50
-40
-30
-20
-10
Figure 9. THD+N vs. Input Level
AKM
-70 -72.5 -75 -77.5 -80 -82.5 -85 -87.5 -90 d B F S -92.5 -95 -97.5 -100 -102.5 -105 -107.5 -110 -112.5 -115 -117.5 -120 20 50 100 200
AK5381 THD+N vs. Input Frequency VA=VD=5.0V, fs=96kHz, Input=-1dBr
500
1k Hz
2k
5k
10k
20k
40k
Figure 10. THD+N vs. Input Frequency
- 11 -
2006/04
ASAHI KASEI
[AKD5381-B]
AKM
+0 -10 -20 -30 -40 -50 d B F S -60 -70 -80 -90 -100 -110 -120 -120
AK5381 Linearity VA=VD=5.0V, fs=96kHz, fin=1kHz
-110
-100
-90
-80
-70
-60 dBr
-50
-40
-30
-20
-10
+0
Figure 11. Linearity
AKM
-0.5 -0.55 -0.6 -0.65 -0.7 -0.75 -0.8 -0.85 -0.9 d B F S -0.95 -1 -1.05 -1.1 -1.15 -1.2 -1.25 -1.3 -1.35 -1.4 -1.45 -1.5 20 50 100 200
AK5381 Frequency Response VA=VD=5.0V, fs=96kHz, Input=-1dBr
500
1k Hz
2k
5k
10k
20k
40k
Figure 12. Frequency Response
- 12 -
2006/04
ASAHI KASEI
[AKD5381-B]
AKM
-70 -75 -80 -85 -90 -95 -100 -105 d B -110 -115 -120 -125 -130 -135 -140 -145 -150 20
AK5381 Crosstalk VA=VD=5.0V, fs=96kHz, Input=-1dBr
50
100
200
500
1k Hz
2k
5k
10k
20k
40k
Figure 13. Crosstalk
AKM
+0 -10 -20 -30 -40 -50 -60 -70 d B F S -80 -90 -100 -110 -120 -130 -140 -150 -160 -170 -180 20 50 100
AK5381 FFT Plot VA=VD=5.0V, fs=96kHz, Input=-1dBr, fin=1kHz
200
500
1k Hz
2k
5k
10k
20k
40k
Figure 14. FFT Plot
- 13 -
2006/04
ASAHI KASEI
[AKD5381-B]
AKM
+0 -10 -20 -30 -40 -50 -60 -70 d B F S -80 -90 -100 -110 -120 -130 -140 -150 -160 -170 -180 20 50 100
AK5381 FFT Plot VA=VD=5.0V, fs=96kHz, Input=-60dBr, fin=1kHz
200
500
1k Hz
2k
5k
10k
20k
40k
Figure 15. FFT Plot
AKM
+0 -10 -20 -30 -40 -50 -60 -70 d B F S -80 -90 -100 -110 -120 -130 -140 -150 -160 -170 -180 20 50 100 200
AK5381 FFT Plot VA=VD=5.0V, fs=96kHz, fin=None
500
1k Hz
2k
5k
10k
20k
40k
Figure 16. FFT Plot
- 14 -
2006/04
ASAHI KASEI
[AKD5381-B]
Revision History
Date (YY/MM/DD) 04/05/14 05/01/14 06/04/24 Manual Revision KM074700 KM074701 KM074702 Board Revision 0 1 Reason First Edition Board Name Change Circuit Change Error Correction AKD5381 Rev.B AKD5381-B Rev.0
The information on AK5357 was removed.
Contents
Board Rev: 0 1
IMPORTANT NOTICE * These products and their specifications are subject to change without notice. Before considering any use or application, consult the Asahi Kasei Microsystems Co., Ltd. (AKM) sales office or authorized distributor concerning their current status. * AKM assumes no liability for infringement of any patent, intellectual property, or other right in the application or use of any information contained herein. * Any export of these products, or devices or systems containing them, may require an export license or other official approval under the law and regulations of the country of export pertaining to customs and tariffs, currency exchange, or strategic materials. * AKM products are neither intended nor authorized for use as critical components in any safety, life support, or other hazard related device or system, and AKM assumes no responsibility relating to any such use, except with the express written consent of the Representative Director of AKM. As used here: (a) A hazard related device or system is one designed or intended for life support or maintenance of safety or for applications in medicine, aerospace, nuclear energy, or other fields, in which its failure to function or perform may reasonably be expected to result in loss of life or in significant injury or damage to person or property. (b) A critical component is one whose failure to function or perform may reasonably be expected to result, whether directly or indirectly, in the loss of the safety or effectiveness of the device or system containing it, and which must therefore meet very high standards of performance and reliability. * It is the responsibility of the buyer or distributor of an AKM product who distributes, disposes of, or otherwise places the product with a third party to notify that party in advance of the above content and conditions, and the buyer or distributor agrees to assume any and all responsibility and liability for and hold AKM harmless from any and all claims arising from the use of said product in the absence of such notification.
- 15 -
2006/04
A
B
C
D
E
E
DGND J1 RIN C1 10u +
JP1 GND
E
AGND
VD SW1 U1
1 2 3 4 8 7 6 5
J2 LIN
C2 10u
1
CKS0 CKS2 DIF DIF1 RP1
4 3 2 1
D
MODE
AINR CKS0 16
+
D
2
AINL
CKS2
15
DIF1
47k
3
L VA VA
1 1
CKS1
DIF
14
DIF0
JP2 CKS1 H C3 2.2u C5 10u + C4 0.1u
4
VCOM
PDN
13
T1 NJM78M05FA
GND IN OUT 3
JP3 REG REG REG + C8 47u C9 0.1u R3 5.1
R1
5 AGND SCLK 12
51 SCLK
C10 47u
2
C
+
C7 0.1u
C6 0.1u
6 VA MCLK 11
2
C11 10u VA
JP4 VD VD VD
1
C13 47u
2
+
2
1
B
3
1
6
5
VD for 74HC14 C15 0.1u
10 8
U2C 74HC14
9
U2D 74HC14
11
U2E 74HC14
A
12
13
2
A
B
+
R2
51 MCLK
R4
7 VD LRCK 10
51 LRCK
C
+ C12 0.1u
8 DGND SDTO 9
R5
51 SDTO
AK5381
VD
D1 HSU119
R6 10k
1
U2A 74HC14
2 3
U2B 74HC14
4
PDN
B
L
H
SW2 PDN
C14 0.1u
A
U2F 74HC14
Title Size Document Number
AKD5381-B
Rev
A3
Date:
C D
AK5381
Monday, April 24, 2006
Sheet
E
1 1
of
2
A
B
C
D
E
VCC REG
E E
+ C16 47u
C17 10u C18 0.1u
+ + C19 0.47u
39 38 37
47
45
43
41
48
46
44
D
42
40
VCOM
AVSS
R
TEST1
AVDD
NC
NC
1
INT1
RX3
RX2
RX1
RX0
IPS0
2
NC
DIF0
3
DIF0
4
TEST2
C
DIF1
5
DIF1
U3
6 NC
AK4114
1
7
DIF2
IPS1
XTO
2
8
9
P/SN
10
XTL0
B
11
XTL1
12
VIN MCKO1 DVDD COUT UOUT BOUT VOUT DVSS DVSS TVDD LRCK TX0 TX1
13
14
15
16
17
18
19
20
21
22
23
C22 0.1u C24 10u +
C23 0.1u C25 10u +
24
PORT2
A
IN VCC GND
3 2 1
C26 0.1u
Title Size Document Number
DIT
A
B
+ +
D
INT0
36
OCKS0
35
OCKS1
34
MCLK
CM1
33
SCLK PORT1 MCLK SCLK LRCK SDTO
1 2 3 4 5 10 9 8 7 6
CM0
32
LRCK
31
C
PDN
PDN C20 10p SDTO
DSP
XTI
30
X1 12.288MHz
29
C21 10p
DAUX 28
MCKO2
27
BICK
26
B
SDTO
25
JP5 MCLK
A
AKD5381-B
AK4114
Sheet
E
Rev
A3
Date:
C D
1 2
of
Monday, April 24, 2006
2


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